Electronics Automation

Cadence Design Systems and Silicon Integration Initiative (Si2) have aligned their efforts to produce a common industry standard for low-power design, implementation and verification.

Cadence Design Systems and Silicon Integration Initiative (Si2) have aligned their efforts to produce a common industry standard for low-power design, implementation and verification. The combined effort calls for the Si2 Low Power Coalition to standardise on the Common Power Format (CPF) for a single-file approach to low-power design intent. Cadence intends to contribute CPF to Si2 by 31st January 2007 after completing the feedback process with Power Forward Initiative advisors, and has already made a read-only version available to Si2 Low Power Coalition members.

IEEE standardisation of CPF will now be subject to a decision and approval of the Si2 Low Power Coalition.

'Si2 applauds the vision of the EDA- and semiconductor-industry leaders in working together towards a single power-format standard', said Steve Schulz, President and CEO, Si2.

'We look forward to supporting all Low Power Coalition members as they use CPF to develop the industry's open standard for low-power design'.

'Customers have called for a single, holistic approach to address the gaps in linking low-power design, implementation and verification'.

'They do not want a standards war', said Jan Willis, Senior Vice President of Industry Alliances at Cadence.

'Customers are already seeing the benefits enabled by a single file approach'.

'So we are delighted to contribute CPF to Si2 where we believe a strong cross section of committed companies exists to drive the unification of low-power standards'.